A memory device of a three-dimensional structure is proposed in which a memory hole is formed in a stacked body in which a conductive layer functioning as the control gate of a memory cell and an insulating layer are alternately stacked in plural, and a silicon body serving as a channel is provided on the side wall of the memory hole via a charge storage film. A resistance element of a peripheral circuit is formed using polysilicon that is the material of the gate electrode of a CMOS formed on the surface of a substrate.